Issued Patents 2018
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9898568 | Reducing the load on the bitlines of a ROM bitcell array | Janardhan Achanta, Pankaj Kumar, Shreekanth Sampigethaya | 2018-02-20 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9898568 | Reducing the load on the bitlines of a ROM bitcell array | Janardhan Achanta, Pankaj Kumar, Shreekanth Sampigethaya | 2018-02-20 |