GP

Giles V. Powell

CS Cadence Design Systems: 1 patents #56 of 223Top 30%
IN Intel: 1 patents #2,031 of 5,158Top 40%
Overall (2018): #147,782 of 503,207Top 30%
2
Patents 2018

Issued Patents 2018

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10043716 N-well/P-well strap structures Dustin Do, Andy L. Lee, Bradley Jensen, Swee Aun Lau, Wuu-Cherng Lin +1 more 2018-08-07
9904756 Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with lateral fills in electronic designs Roland Ruehl, Alexandre Arkhipov, Karun Sharma 2018-02-27