SJ

Sowmiya Jayachandran

IN Intel: 2 patents #1,186 of 5,158Top 25%
Overall (2018): #101,600 of 503,207Top 25%
2
Patents 2018

Issued Patents 2018

Patent #TitleCo-InventorsDate
10153015 Managing disturbance induced errors Prashant S. Damle, Frank T. Hady, Paul D. Ruby, Kiran Pangal 2018-12-11
9916104 Techniques for entry to a lower power state for a memory device Rajesh Sundaram, Robert W. Faber 2018-03-13