Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10096599 | Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) process | Curtis Tsai, Chia-Hong Jan, Jeng-Ya David Yeh, Walid M. Hafez | 2018-10-09 |
| 9972642 | High voltage three-dimensional devices having dielectric liners | Walid M. Hafez, Jeng-Ya David Yeh, Curtis Tsai, Chia-Hong Jan, Gopinath Bhimarasetti | 2018-05-15 |
| 9881927 | CMOS-compatible polycide fuse structure and method of fabricating same | Jeng-Ya David Yeh, Chia-Hong Jan, Walid M. Hafez | 2018-01-30 |