JB

Jayashankar Bharadwaj

IN Intel: 3 patents #763 of 5,158Top 15%
Overall (2018): #72,845 of 503,207Top 15%
3
Patents 2018

Issued Patents 2018

Patent #TitleCo-InventorsDate
9921832 Instruction to reduce elements in a vector register with strided access pattern Albert Hartono, Nalini Vasudevan, Sara S. Baghsorkhi, Victor W. Lee, Daehyun Kim 2018-03-20
9898266 Loop vectorization methods and apparatus Nalini Vasudevan, Christopher J. Hughes, Milind B. Girkar, Mark J. Charney, Robert Valentine +4 more 2018-02-20
9891920 Systems, apparatuses, and methods for generating a dependency vector based on two source writemask registers 2018-02-13