Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10146738 | Hardware accelerator architecture for processing very-sparse and hyper-sparse matrix data | Eriko Nurvitadhi | 2018-12-04 |
| 10049080 | Asymmetric performance multicore architecture with same instruction set architecture | Varghese George, Sanjeev Jahagirdar | 2018-08-14 |
| 9996361 | Byte and nibble sort instructions that produce sorted destination register and destination index mapping | Asit K. Mishra, Kshitij A. Doshi, Elmoustapha Ould-Ahmed-Vall | 2018-06-12 |