Issued Patents 2018
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10133624 | Fault localization and error correction method for self-checking binary signed-digit adder and digital logic circuit for the method | Jeong A Lee | 2018-11-20 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10133624 | Fault localization and error correction method for self-checking binary signed-digit adder and digital logic circuit for the method | Jeong A Lee | 2018-11-20 |