Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10096377 | Simultaneous scan chain initialization with disparate latches | Mitesh Agrawal, Benedikt Geukes | 2018-10-09 |
| 10026498 | Simultaneous scan chain initialization with disparate latches | Mitesh Agrawal, Benedikt Geukes | 2018-07-17 |
| 10014074 | Failure analysis and repair register sharing for memory BIST | Deepak I. Hanagandi, Michael R. Ouellette, Valerie H. Chickanosky | 2018-07-03 |
| 9881694 | Built-in-self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Kiran K. Narayan, Michael R. Ouellette +1 more | 2018-01-30 |
| 9859019 | Programmable counter to control memory built in self-test | Deepak I. Hanagandi, Kiran K. Narayan, Michael R. Ouellette, Michael A. Ziegerhofer | 2018-01-02 |