Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162773 | Double data rate (DDR) memory read latency reduction | Steven R. Carlough, Susan M. Eickhoff, Michael B. Spear, Stephen D. Wyatt | 2018-12-25 |
| 10134455 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Stephen P. Glancy, Warren E. Maule | 2018-11-20 |
| 10090065 | Simultaneous write, read, and command-address-control calibration of an interface within a circuit | Stephen P. Glancy, Jeremy R. Neaton | 2018-10-02 |
| 10078461 | Partial data replay in a distributed memory buffer system | Susan M. Eickhoff, Steven R. Carlough, Patrick J. Meaney, Stephen J. Powell, Jie Zheng | 2018-09-18 |
| 10068634 | Simultaneous write and read calibration of an interface within a circuit | Stephen P. Glancy | 2018-09-04 |
| 10061886 | Physically aware test patterns in semiconductor fabrication | William V. Huott, Kevin M. McIvain, Samir Patel | 2018-08-28 |
| 9922163 | Physically aware test patterns in semiconductor fabrication | William V. Huott, Kevin M. McIvain, Samir Patel | 2018-03-20 |
| 9899067 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Stephen P. Glancy, Warren E. Maule | 2018-02-20 |