Issued Patents 2018
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10095479 | Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure | Albert Meixner, David Patterson, Daniel Frederic Finchelstein, Qiuling Zhu, Jason Redgrave | 2018-10-09 |
| 9986187 | Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register | Albert Meixner, Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave | 2018-05-29 |
| 9978116 | Core processes for block operations on an image processor having a two-dimensional execution lane array and a two-dimensional shift register | Albert Meixner, Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave | 2018-05-22 |
| 9965824 | Architecture for high performance, power efficient, programmable image processing | Qiuling Zhu, Albert Meixner, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more | 2018-05-08 |