Issued Patents 2018
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10146438 | Additive library for data structures in a flash memory | Philip Shilane | 2018-12-04 |
| 10146686 | Lock free container packing | Philip Shilane | 2018-12-04 |
| 10146616 | Cache based recovery of corrupted or missing data | Philip Shilane | 2018-12-04 |
| 10135462 | Deduplication using sub-chunk fingerprints | Philip Shilane, Mark Huang, Edward K. Lee, Kai Li | 2018-11-20 |
| 10089025 | Bloom filters in a flash memory | Philip Shilane | 2018-10-02 |
| 10078583 | Method and system for reducing memory used in embedded DDRs by using spare drives for OOC GC | — | 2018-09-18 |
| 10078598 | Maintaining a separate LRU linked list for each thread for multi-threaded access | Philip Shilane | 2018-09-18 |
| 10055351 | Low-overhead index for a flash cache | Philip Shilane | 2018-08-21 |
| 10037164 | Flash interface for processing datasets | Philip Shilane | 2018-07-31 |
| 10007809 | Fine-grained self-shredding data in a secure communication ecosystem | Frederick Douglis, Radia J. Perlman, Philip Shilane | 2018-06-26 |
| 9934237 | Metadata optimization for network replication using representative of metadata batch | Philip Shilane | 2018-04-03 |
| 9921963 | Method to decrease computation for cache eviction using deferred calculations | Cheng Li, Philip Shilane | 2018-03-20 |
| 9892044 | Methods to efficiently implement coarse granularity cache eviction | Frederick Douglis, Cheng Li, Philip Shilane | 2018-02-13 |
| 9892045 | Methods to select segments of an evicted cache unit for reinsertion into the cache | Frederick Douglis, Cheng Li, Philip Shilane | 2018-02-13 |
| 9880746 | Method to increase random I/O performance with low memory overheads | Philip Shilane, Frederick Douglis | 2018-01-30 |
| 9875182 | Lock free container packing | Philip Shilane | 2018-01-23 |