YW

Yosinori Watanabe

CS Cadence Design Systems: 2 patents #20 of 223Top 9%
📍 Lafayette, CA: #16 of 88 inventorsTop 20%
🗺 California: #12,239 of 60,411 inventorsTop 25%
Overall (2018): #86,797 of 503,207Top 20%
2
Patents 2018

Issued Patents 2018

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10140202 Source code annotation for a system on chip Michele Petracca 2018-11-27
10133837 Method and apparatus for converting real number modeling to synthesizable register-transfer level emulation in digital mixed signal environments Ophir Turbovich, Michael Young, Sean Dart 2018-11-20