GZ

Gavin Zawalski

CS Cadence Design Systems: 1 patents #56 of 223Top 30%
📍 San Jose, CA: #2,540 of 5,991 inventorsTop 45%
🗺 California: #23,431 of 60,411 inventorsTop 40%
Overall (2018): #414,504 of 503,207Top 85%
1
Patents 2018

Issued Patents 2018

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9946831 Method for closed loop testing of ASICs with image sensors in emulation Wenyong HUANG 2018-04-17