Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10033520 | Multilane serdes clock and data skew alignment for multi-standard support | Adesh Garg, Jun Cao, Namik Kocaman, Kuo-J Huang, Delong Cui | 2018-07-24 |
| 10014846 | Increasing output amplitude of a voltage-mode driver in a low supply voltage technology | Adesh Garg | 2018-07-03 |