Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10161993 | Tester with acceleration on memory and acceleration for automatic pattern generation within a FPGA block | John K. Frediani | 2018-12-25 |
| 10162007 | Test architecture having multiple FPGA based hardware accelerator blocks for testing multiple DUTs independently | Gerald Chan, Eric Barr Kushnick, Mei-Mei Su | 2018-12-25 |
| 9952276 | Tester with mixed protocol engine in a FPGA block | Jonh Frediani | 2018-04-24 |