Issued Patents 2017
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639488 | Encoding valid data states in source synchronous bus interfaces using clock signal transitions | Gregory Sadowski, Arun Sundaresan Iyer | 2017-05-02 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639488 | Encoding valid data states in source synchronous bus interfaces using clock signal transitions | Gregory Sadowski, Arun Sundaresan Iyer | 2017-05-02 |