Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9798344 | Power switch with source-bias mode for on-chip powerdomain supply drooping | Shane Stelmach, Soman Purushotaman, Michael J. Gill, Jose Luis Flores | 2017-10-24 |
| 9652392 | Using L1 cache as re-order buffer | Oluleye Olorode, Hung Ong | 2017-05-16 |
| 9652402 | Hiding page translation miss latency in program memory controller by next page prefetch on crossing page boundary | Oluleye Olorode | 2017-05-16 |
| 9618956 | On-chip power-domain supply drooping for low voltage idle/standby management | Michael J. Gill, Shane Stelmach, Jose Luis Flores | 2017-04-11 |
| 9606803 | Highly integrated scalable, flexible DSP megamodule architecture | Timothy David Anderson, Joseph Zbiciak, Duc Quang Bui, Abhijeet Ashok Chachad, Kai Chirca +3 more | 2017-03-28 |
| 9557936 | Protection of memories, datapath and pipeline registers, and other storage elements by distributed delayed detection and correction of soft errors | Timothy David Anderson, Joseph Zbiciak, Abhijeet Ashok Chachad, Kai Chirca, Naveen Bhoria +2 more | 2017-01-31 |