Issued Patents 2017
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9768256 | Formation of dislocations in source and drain regions of FinFET devices | Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Wei-Yang Lee | 2017-09-19 |
| 9768277 | Method and apparatus of forming an integrated circuit with a strained channel region | Ming-Lung Cheng, Yen-Chun Lin | 2017-09-19 |
| 9620386 | Methods of annealing after deposition of gate layers | Chun Hsiung Tsai, Xiong-Fei Yu, Yu-Lien Huang | 2017-04-11 |
| 9590101 | FinFET with multiple dislocation planes and method for forming the same | Chih-Hsiang Huang | 2017-03-07 |
| 9537010 | Semiconductor device structure and method for forming the same | Tsan-Chun Wang, Ziwei Fang, Chien-Tai Chan, Huicheng Chang | 2017-01-03 |