Issued Patents 2017
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9755022 | Epitaxial silicon wafer having reduced stacking faults | Naoya NONAKA, Masayuki Shinagawa, Gou Uesono | 2017-09-05 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9755022 | Epitaxial silicon wafer having reduced stacking faults | Naoya NONAKA, Masayuki Shinagawa, Gou Uesono | 2017-09-05 |