Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9793288 | Methods of fabricating memory device with spaced-apart semiconductor charge storage regions | Hiroyuki Kamiya | 2017-10-17 |
| 9754956 | Uniform thickness blocking dielectric portions in a three-dimensional memory structure | Masanori Tsutsumi | 2017-09-05 |
| 9716062 | Multilevel interconnect structure and methods of manufacturing the same | Hiroyuki Ogawa | 2017-07-25 |
| 9548313 | Method of making a monolithic three dimensional NAND string using a select gate etch stop layer | Shigehiro Fujino, Hajime Kimura, Masanori Terahara, Ryoichi Honma, Hiroyuki Ogawa +1 more | 2017-01-17 |