Issued Patents 2017
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9673304 | Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory | Michiaki Sano, Akira Nakada, Tetsuya Yamada, Manabu Hayashi, Takashi Matsubara +1 more | 2017-06-06 |