Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9760672 | Circuitry and method for critical path timing speculation to enable process variation compensation via voltage scaling | Sanjiv Taneja, Trent McClements, Andrew Hughes, Sheida Alan, Bozena Kaminska | 2017-09-12 |
| 9564883 | Circuitry and method for timing speculation via toggling functional critical paths | Trent McClements, Andrew Hughes, Sanjiv Taneja | 2017-02-07 |
| 9564884 | Circuitry and method for measuring negative bias temperature instability (NBTI) and hot carrier injection (HCI) aging effects using edge sensitive sampling | Trent McClements, Andrew Hughes, Sanjiv Taneja | 2017-02-07 |
| 9535121 | Methods and apparatuses to enhance timing delay fault coverage with test logic that includes partitions and scan flip-flops | Sanjiv Taneja, Andrew Hughes, Trent McClements | 2017-01-03 |
| 9536038 | Method and algorithm for functional critical paths selection and critical path sensors and controller insertion | Trent McClements, Andrew Hughes, Sanjiv Taneja | 2017-01-03 |
| 9536625 | Circuitry and method for critical path timing speculation in RAMs | Trent McClements, Andrew Hughes, Sanjiv Taneja | 2017-01-03 |