Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9836567 | Method of simulating a semiconductor integrated circuit, computer program product, and device for simulating a semiconductor integrated circuit | Uzi Magini, Michael Priel | 2017-12-05 |
| 9792399 | Integrated circuit hierarchical design tool apparatus and method of hierarchically designing an integrated circuit | Inbar Ben-Porat, Yossy Neeman | 2017-10-17 |
| 9709629 | Method and control device for launch-off-shift at-speed scan testing | Sergey Sofer, Michael Priel | 2017-07-18 |
| 9652572 | Method and apparatus for performing logic synthesis | Michael Priel, Eliya Babitsky, Vladimir Nusimovich | 2017-05-16 |
| 9607117 | Method and apparatus for calculating delay timing values for an integrated circuit design | Michael Priel, Sergey Sofer | 2017-03-28 |
| 9542523 | Method and apparatus for selecting data path elements for cloning | Michael Priel, Slavaf Fleshel, Amir Grinshpon, Dan Kuzmin, Yoav Miller | 2017-01-10 |