Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9852088 | Hazard checking control within interconnect circuitry | Andrew David Tune, Daniel Sara, Sean James Salisbury, Peter Andrew Riocreux | 2017-12-26 |
| 9672153 | Memory interface control | Christopher William Laycock, Antony John Harris | 2017-06-06 |
| 9632955 | Reorder buffer permitting parallel processing operations with repair on ordering hazard detection within interconnect circuitry | Andrew David Tune, Daniel Sara | 2017-04-25 |