Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9767027 | Private memory regions and coherency optimization by controlling snoop traffic volume in multi-level cache hierarchy | David Callahn, Burton Smith, Gad Sheaffer, Ali-Reza Adl-Tabatabai | 2017-09-19 |
| 9720693 | Bulk allocation of instruction blocks to a processor instruction window | Douglas C. Burger, Aaron L. Smith | 2017-08-01 |
| 9658880 | Efficient garbage collection and exception handling in a hardware accelerated transactional memory system | Martin Taillefer, Yosseff Levanoni, Ali-Reza Adl-Tabatabai, Dave Detlefs, Vinod Grover +2 more | 2017-05-23 |