Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9689918 | Test access architecture for stacked memory and logic dies | Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Etienne Racine, Martin Keim +3 more | 2017-06-27 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9689918 | Test access architecture for stacked memory and logic dies | Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Etienne Racine, Martin Keim +3 more | 2017-06-27 |