Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9805803 | Circuit for adjusting a select gate voltage of a non-volatile memory during erasure of memory cells based on a well voltage | Shin-Jang Shen, Wei-Jen Chen | 2017-10-31 |
| 9773571 | Memory repair redundancy with array cache redundancy | Chi Lo, Chun-Hsiung Hung | 2017-09-26 |
| 9690650 | Storage scheme for built-in ECC operations | Yi-Ching Liu, Chi Lo, Chun-Hsiung Hung | 2017-06-27 |