Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847340 | Methods of tunnel oxide layer formation in 3D NAND memory structures and associated devices | Darwin Franseda Fan, Sateesh Koka, Gordon A. Haller, John D. Hopkins, Anish A. Khandekar | 2017-12-19 |
| 9773677 | Semiconductor device structures with doped elements and methods of formation | — | 2017-09-26 |
| 9691773 | Silicon buried digit line access device and method of forming the same | Lars Heineck | 2017-06-27 |
| 9559201 | Vertical memory devices, memory arrays, and memory devices | — | 2017-01-31 |