NV

Nalini Vasudevan

IN Intel: 6 patents #367 of 5,604Top 7%
Overall (2017): #19,422 of 506,227Top 4%
6
Patents 2017

Issued Patents 2017

Patent #TitleCo-InventorsDate
9798541 Apparatus and method for propagating conditionally evaluated values in SIMD/vector execution using an input mask register Jayashankar Bharadwaj, Victor W. Lee, Daehyun Kim, Albert Hartono, Sara S. Baghsorkhi 2017-10-24
9733913 Methods and systems to vectorize scalar computer program loops having loop-carried dependences Jayashankar Bharadwaj, Albert Hartono, Sara S. Baghsorkhi 2017-08-15
9720667 Automatic loop vectorization using hardware transactional memory Sara S. Baghsorkhi, Albert Hartono, Youfeng Wu, Cheng Wang 2017-08-01
9710279 Method and apparatus for speculative vectorization Cheng Wang, Youfeng Wu, Albert Hartono, Sara S. Baghsorkhi 2017-07-18
9703558 Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate Victor W. Lee, Daehyun Kim, Tin-Fook Ngai, Jayashankar Bharadwaj, Albert Hartono +1 more 2017-07-11
9690582 Instruction and logic for cache-based speculative vectorization Youfeng Wu, Cheng Wang, Sara S. Baghsorkhi, Albert Hartono 2017-06-27