Issued Patents 2017
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639640 | Generation of delay values for a simulation model of circuit elements in a clock network | Nagaraj Savithri, Robert M. Ondris | 2017-05-02 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639640 | Generation of delay values for a simulation model of circuit elements in a clock network | Nagaraj Savithri, Robert M. Ondris | 2017-05-02 |