Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9740617 | Hardware apparatuses and methods to control cache line coherence | Samantika S. Sury, William C. Hasenplaugh, Joel S. Emer, David A. Webb | 2017-08-22 |
| 9734069 | Multicast tree-based data distribution in distributed shared cache | William C. Hasenplaugh, Samantika S. Sury | 2017-08-15 |
| 9727482 | Address range priority mechanism | Samantika S. Sury, William C. Hasenplaugh | 2017-08-08 |
| 9588889 | Domain state | William C. Hasenplaugh, Joel S. Emer | 2017-03-07 |