Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JB

Jagdeep Bal — 4 Patents in 2017

ITIntegrated Device Technology: 4 patents #1 of 67Top 2%
Saratoga, CA: #104 of 665 inventorsTop 20%
California: #5,406 of 60,394 inventorsTop 9%
Overall (2017): #46,006 of 506,227Top 10%
4 Patents 2017

Issued Patents 2017

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9614508 System and method for deskewing output clock signals Louis F. Poitras 2017-04-04 $23,560,000
9581973 Dual mode clock using a common resonator and associated method of use Pankaj Goyal, Stephen E. Aycock 2017-02-28 $8,150,000
9553570 Crystal-less jitter attenuator 2017-01-24 $6,802,000
9553602 Methods and systems for analog-to-digital conversion (ADC) using an ultra small capacitor array with full range and sub-range modes I-Chang Wu 2017-01-24 $6,802,000