Issued Patents 2017
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9852075 | Allocate a segment of a buffer to each of a plurality of threads to use for writing data | Herve G. P. Andre, Juan J. Ruiz | 2017-12-26 |
| 9842016 | Multiple path error data collection in a storage management system | Gary W. Batchelor, Matthew D. Carson, Enrique Q. Garcia, Larry Juarez, Jay T. Kirch +3 more | 2017-12-12 |
| 9842010 | Adjustment of a sleep duration for a process based on an expected time for securing a spinlock | Seamus J. Burke, Louis A. Rasor | 2017-12-12 |
| 9798466 | Using a plurality of sub-buffers and a free segment list to allocate segments to a plurality of threads to use for writing data | Herve G. P. Andre, Juan J. Ruiz | 2017-10-24 |
| 9772785 | Controlling partner partitions in a clustered storage system | Yolanda Colpo, Larry Juarez, Sean P. Riley | 2017-09-26 |
| 9766982 | Preferential allocation of processors for statesave in a storage controller | Kevin J. Ash, Maoyun Tang | 2017-09-19 |
| 9753773 | Performance-based multi-mode task dispatching in a multi-processor core system for extreme temperature avoidance | Matthew G. Borlick, Lokesh M. Gupta | 2017-09-05 |
| 9747210 | Managing a lock to a resource shared among a plurality of processors | — | 2017-08-29 |
| 9747139 | Performance-based multi-mode task dispatching in a multi-processor core system for high temperature avoidance | Matthew G. Borlick, Lokesh M. Gupta | 2017-08-29 |
| 9606835 | Determination of memory access patterns of tasks in a multi-core processor | Matthew G. Borlick, Lokesh M. Gupta | 2017-03-28 |
| 9571578 | Utilization based multi-buffer self-calibrated dynamic adjustment management | Herve G. P. Andre, Juan J. Ruiz | 2017-02-14 |