Issued Patents 2017
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9792213 | Mitigating busy time in a high performance cache | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf | 2017-10-17 |
| 9734110 | Dynamic synchronous to asynchronous frequency transitions in high-performance symmetric multiprocessing | Garrett M. Drapala, Michael Fee, Kenneth D. Klapproth | 2017-08-15 |
| 9727464 | Nested cache coherency protocol in a tiered multi-node computer system | Garrett M. Drapala, William J. Lewis, Pak-kin Mak | 2017-08-08 |
| 9720833 | Nested cache coherency protocol in a tiered multi-node computer system | Garrett M. Drapala, William J. Lewis, Pak-kin Mak | 2017-08-01 |
| 9678873 | Early shared resource release in symmetric multiprocessing computer systems | Garrett M. Drapala, Vesselina K. Papazova | 2017-06-13 |