Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9613172 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2017-04-04 |
| 9606934 | Matrix ordering for cache efficiency in performing large sparse matrix operations | Rajesh Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian +1 more | 2017-03-28 |
| 9600615 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2017-03-21 |