Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9829535 | Test structure to measure delay variability mismatch of digital logic paths | Karthik Balakrishnan, Bruce M. Fleischer, Keith A. Jenkins | 2017-11-28 |
| 9702924 | Simultaneously measuring degradation in multiple FETs | Karthik Balakrishnan, Keith A. Jenkins | 2017-07-11 |
| 9618966 | Pulse-drive resonant clock with on-the-fly mode change | Thomas J. Bucelot, Robert L. Franch, Phillip J. Restle, David Wen-Hao Shan | 2017-04-11 |
| 9612614 | Pulse-drive resonant clock with on-the-fly mode change | Thomas J. Bucelot, Robert L. Franch, Phillip J. Restle, David Wen-Hao Shan | 2017-04-04 |