| 9852095 |
Suspend and resume in a time shared coprocessor |
Bulent Abali, Craig B. Agricola, Kenneth A. Lauricella, John J. Reilly, Dorothy Marie Thelen |
2017-12-26 |
| 9740629 |
Tracking memory accesses when invalidating effective address to real address translations |
Jay G. Heaslip, Kenneth A. Lauricella, Jeffrey A. Stuecheli |
2017-08-22 |
| 9727483 |
Tracking memory accesses when invalidating effective address to real address translations |
Jay G. Heaslip, Kenneth A. Lauricella, Jeffrey A. Stuecheli |
2017-08-08 |
| 9710310 |
Dynamically configurable hardware queues for dispatching jobs to a plurality of hardware acceleration engines |
Brian Mitchell Bass, George William Daly, Jeffrey H. Derby, Ross Boyd Leavens, Joseph Gerald McDonald |
2017-07-18 |
| 9628109 |
Operation of a multi-slice processor implementing priority encoding of data pattern matches |
Bulent Abali, John J. Reilly |
2017-04-18 |
| 9606922 |
Selection of post-request action based on combined response and input from the request source |
David W. Cummings, Brian Flachs, Michael S. Siegel, Jeffrey A. Stuecheli |
2017-03-28 |
| 9606838 |
Dynamically configurable hardware queues for dispatching jobs to a plurality of hardware acceleration engines |
Brian Mitchell Bass, George William Daly, Jeffrey H. Derby, Ross Boyd Leavens, Joseph Gerald McDonald |
2017-03-28 |
| 9606861 |
Concurrent error detection in a ternary content-addressable memory (TCAM) device |
Bulent Abali |
2017-03-28 |
| 9584156 |
Creating a dynamic Huffman table |
Bulent Abali, Hubertus Franke, John J. Reilly |
2017-02-28 |
| 9575728 |
Random number generation security |
Benjamin Herrenschmidt, David A. Larson Stanton, Derek E. Williams |
2017-02-21 |
| 9547597 |
Selection of post-request action based on combined response and input from the request source |
David W. Cummings, Brian Flachs, Michael S. Siegel, Jeffrey A. Stuecheli |
2017-01-17 |
