Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9804917 | Notification of address range including non-correctable error | — | 2017-10-31 |
| 9804972 | Regulating memory activation rates | Melvin K. Benedict, William James Walker | 2017-10-31 |
| 9778982 | Memory erasure information in cache lines | Lidia Warnes, Erin A. Handgen | 2017-10-03 |
| 9645857 | Resource fault management for partitions | Jeffrey A. Barlow, Howard Calkin | 2017-05-09 |