Issued Patents 2017
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853124 | Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacers | Sylvain Barraud, Emmanuel Augendre, Sylvain Maitrejean | 2017-12-26 |
| 9805948 | Selective etching process of a mask disposed on a silicon substrate | — | 2017-10-31 |
| 9780191 | Method of forming spacers for a gate of a transistor | — | 2017-10-03 |
| 9780000 | Method for forming spacers for a transitor gate | Maxime Garcia-Barros | 2017-10-03 |
| 9773674 | Method for forming patterns by implanting | — | 2017-09-26 |
| 9698250 | Method for the surface etching of a three-dimensional structure | Christian Arvet, Sebastien Barnola | 2017-07-04 |
| 9679802 | Method of etching a porous dielectric material | — | 2017-06-13 |
| 9607840 | Method for forming spacers for a transistor gate | — | 2017-03-28 |
| 9607823 | Protection method for protecting a silicide layer | — | 2017-03-28 |
| 9583339 | Method for forming spacers for a transistor gate | Thibaut David, Olivier Joubert, Thorsten Lill, Srinivas D. Nemani, Laurent Vallier | 2017-02-28 |
| 9570317 | Microelectronic method for etching a layer | Olivier Joubert, Laurent Vallier | 2017-02-14 |
| 9543409 | Production of spacers at flanks of a transistor gate | Christian Arvet, Sebastien Barnola, Sebastien Lagrasta | 2017-01-10 |