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Jinduo Sun

CS Cadence Design Systems: 1 patents #55 of 238Top 25%
Overall (2017): #374,582 of 506,227Top 75%
1
Patents 2017

Issued Patents 2017

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9852258 Method and system for implementing a requirements driven closed loop verification cockpit for analog circuits Paul C. Foster, Walter E. Hartong 2017-12-26