GT

Gerard Tarroux

CS Cadence Design Systems: 5 patents #1 of 238Top 1%
Overall (2017): #31,244 of 506,227Top 7%
5
Patents 2017

Issued Patents 2017

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
9842183 Methods and systems for enabling concurrent editing of electronic circuit layouts Arnold Ginetti, Jean-Noel Pic, Olivier Arnaud, Devendra Deshpande 2017-12-12
9773082 Circuit design employing stamp patterns Fabrice Raymond Morlat, Fabien Campana 2017-09-26
9761204 System and method for accelerated graphic rendering of design layout having variously sized geometric objects Arnold Ginetti, Jean-Noel Pic, Philippe Bourdon 2017-09-12
9684748 System and method for identifying an electrical short in an electronic design Olivier Badel, Nicolas Hadacek 2017-06-20
9542084 System and method for generating vias in an electronic design by automatically using a hovering cursor indication Stephane Colancon, Mark Nitters, Fabien Campana 2017-01-10