EN

Eric Naviasky

CS Cadence Design Systems: 1 patents #55 of 238Top 25%
Overall (2017): #428,994 of 506,227Top 85%
1
Patents 2017

Issued Patents 2017

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9589627 Methods and devices for a DDR memory driver using a voltage translation capacitor Thomas Evan Wilson 2017-03-07