AA

Alexandre Arkhipov

CS Cadence Design Systems: 3 patents #8 of 238Top 4%
📍 San Jose, CA: #928 of 5,952 inventorsTop 20%
🗺 California: #8,040 of 60,394 inventorsTop 15%
Overall (2017): #87,176 of 506,227Top 20%
3
Patents 2017

Issued Patents 2017

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9659138 Methods, systems, and computer program product for a bottom-up electronic design implementation flow and track pattern definition for multiple-patterning lithographic techniques Giles V. Powell, Roland Ruehl, Karun Sharma 2017-05-23
9652579 Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with parallel fills in electronic designs Giles V. Powell, Roland Ruehl, Karun Sharma 2017-05-16
9563737 Method, system, and computer program product for checking or verifying shapes in track patterns for electronic circuit designs Jeffrey Markham, Karun Sharma 2017-02-07