Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9824174 | Power-density-based clock cell spacing | Ankita NAYAK, David A. Kidd | 2017-11-21 |
| 9778676 | Power distribution network (PDN) droop/overshoot mitigation in dynamic frequency scaling | Dipti Ranjan Pal, Mohamed Waleed Allam, Ingyeom Kim | 2017-10-03 |
| 9678556 | Dynamic clock and voltage scaling with low-latency switching | Dipti Ranjan Pal, Mohamed Waleed Allam | 2017-06-13 |
| 9651969 | Adaptive voltage scaling using analytical models for interconnect delay | Ryan Michael Coutts, Shih-Hsin Jason Hu | 2017-05-16 |
| 9612281 | High-speed flip-flop with robust scan-in path hold time | Yi Lou, Ardavan Moassessi, David A. Kidd | 2017-04-04 |
| 9564877 | Reset scheme for scan chains with asynchronous reset signals | Dipti Ranjan Pal, Wai Kit Siu | 2017-02-07 |