Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9830976 | Systems and methods for a high performance memory cell structure | Winston Lee | 2017-11-28 |
| 9666286 | Self-timed SLC NAND pipeline and concurrent program without verification | — | 2017-05-30 |
| 9659636 | NAND memory array with BL-hierarchical structure for concurrent all-BL, all-threshold-state program, and alternative-WL program, odd/even read and verify operations | — | 2017-05-23 |
| 9613704 | 2D/3D NAND memory array with bit-line hierarchical structure for multi-page concurrent SLC/MLC program and program-verify | — | 2017-04-04 |
| 9595319 | Partial/full array/block erase for 2D/3D hierarchical NAND | — | 2017-03-14 |
| 9558811 | Disturb-proof static RAM cells | Winston Lee, Donald Lee | 2017-01-31 |