Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842187 | Representation of complex timing characteristics of startpoint-endpoint pairs in a circuit design | Jindrich Zejda, Atul Srinivasan, Walter A. Manaker, Jr., Benjamin S. Devlin, Satish B. Sivaswamy | 2017-12-12 |
| 9836568 | Programmable integrated circuit design flow using timing-driven pipeline analysis | Aaron Ng, Ronald E. Plyler, Sabyasachi Das, Frederic Revenu | 2017-12-05 |
| 9729153 | Multimode multiplexer-based circuit | Benjamin S. Devlin | 2017-08-08 |
| 9577615 | Circuits for and methods of reducing duty-cycle distortion in an integrated circuit implementing dual-edge clocking | Benjamin S. Devlin | 2017-02-21 |
| 9537491 | Leaf-level generation of phase-shifted clocks using programmable clock delays | Benjamin S. Devlin | 2017-01-03 |