Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9553592 | Circuits for and methods of generating a divided clock signal with a configurable phase offset | Fu-Tai An, Parag Upadhyaya | 2017-01-24 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9553592 | Circuits for and methods of generating a divided clock signal with a configurable phase offset | Fu-Tai An, Parag Upadhyaya | 2017-01-24 |