Issued Patents 2016
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9496313 | CMOS-based thermopile with reduced thermal conductance | Henry Litzmann Edwards, Toan Tran, Ashesh Parikh, Bradley David Sucher | 2016-11-15 |
| 9472571 | Isolated semiconductor layer over buried isolation layer | Daniel N. Carothers | 2016-10-18 |
| 9466520 | Localized region of isolated silicon over recessed dielectric layer | Daniel N. Carothers | 2016-10-11 |
| 9437799 | Method of forming a CMOS-based thermoelectric device | Henry Litzmann Edwards, Kenneth J. Maggio, Toan Tran, Jihong Chen | 2016-09-06 |
| 9437652 | CMOS compatible thermopile with low impedance contact | Henry Litzmann Edwards, Kenneth J. Maggio | 2016-09-06 |
| 9330959 | Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation | Daniel N. Carothers | 2016-05-03 |
| 9312164 | Localized region of isolated silicon over dielectric mesa | Daniel N. Carothers | 2016-04-12 |
| 9231025 | CMOS-based thermoelectric device with reduced electrical resistance | Henry Litzmann Edwards, Kenneth J. Maggio, Toan Tran, Jihong Chen | 2016-01-05 |