Issued Patents 2016
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9419014 | Alternating tap-cell strategy in a standard cell logic block for area reduction | — | 2016-08-16 |
| 9366727 | High density low power scan flip-flop | — | 2016-06-14 |
| 9362910 | Low clock-power integrated clock gating cell | Mahesh Ramdas Vasishta | 2016-06-07 |
| 9331680 | Low power clock gated flip-flops | Mahesh Ramdas Vasishta | 2016-05-03 |