Issued Patents 2016
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE46193 | Distributed power control for controlling power consumption based on detected activity of logic blocks | Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Raguram Damodaran, Joseph Zbiciak +1 more | 2016-11-01 |
| 9390011 | Zero cycle clock invalidate operation | Naveen Bhoria, Raguram Damodaran | 2016-07-12 |
| 9298643 | Performance and power improvement on DMA writes to level two combined cache/SRAM that is cached in level one data cache and line is valid and dirty | Jonathan (Son) Hung Tran, Raguram Damodaran, Joseph Zbiciak | 2016-03-29 |
| 9268708 | Level one data cache line lock and enhanced snoop protocol during cache victims and writebacks to maintain level one data cache and level two cache coherence | Raguram Damodaran, Jonathan (Son) Hung Tran, David Matthew Thompson | 2016-02-23 |
| 9244837 | Zero cycle clock invalidate operation | Naveen Bhoria, Raguram Damodaran | 2016-01-26 |